SGTL5000XNLA3R2 Freescale Semiconductor, SGTL5000XNLA3R2 Datasheet - Page 25

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SGTL5000XNLA3R2

Manufacturer Part Number
SGTL5000XNLA3R2
Description
IC AUDIO CODEC STEREO 20-QFN
Manufacturer
Freescale Semiconductor
Type
Stereo Audior
Datasheet

Specifications of SGTL5000XNLA3R2

Data Interface
I²C, Serial, SPI™
Number Of Adcs / Dacs
1 / 1
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
90 / 100
Voltage - Supply, Analog
1.62 V ~ 3.6 V
Voltage - Supply, Digital
1.1 V ~ 2 V, 1.62 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
SGTL5000XNLA3R2
Manufacturer:
MAGNACHIP
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SGTL5000XNLA3R2
Manufacturer:
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Quantity:
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SGTL5000 EA2 DS-0-3
D
C
B
A
Notes:
1.
internally. For lowest power operation VDDD can be
driven from an external 1.2V supply with .1uF of
decoupling to ground.
2.
(pin 17) must be connected to a .1uF CAP to ground.
either is above 3V, this CAP is not needed.
3.
(pin 32) is tied to ground).
the I2C address is 0 as CTRL_ADR0_CS (pin 31) is tied
to ground.
4.
grounds for line in and line out and the ground side of
the capacitor tied to VAG.
ground plane (or connected to ground) at a single
point.
The above circuit shows VDDD (pin 30) being derived
If both VDDIO and VDDA are below 3V, the CPFILT pin
The above shows I2C implementation as CTRL_MODE
AGND (pin 7) should be "star" connected to the jack
32QFN Typical Connection Diagram
5
5
This node should via to the
In addition, address 0 of
J?
J?
Audio Jack
Audio Jack
4
4
2
3
4
5
1
C?
C?
0.1uF
0.1uF
VDDA
If
5
5
3
3
LINE_OUT_L
LINE_OUT_R
SGTL5000_32QFN
SGTL5000_32QFN
C?
C?
0.1uF
0.1uF
1
2
3
4
5
6
7
8
U?
U?
GND
HP_R
GND
HP_VGND
VDDA
HP_L
AGND
NC
VDDD
C?
C?
0.1uF
0.1uF
C?
C?
C?
C?
1uF
1uF
1uF
1uF
C?
C?
2
2
Solder Pad to GND
C?
C?
1uF
1uF
I2S_LRCLK
SYS_MCLK
I2S_SCLK
CPFILT
VDDIO
1uF
1uF
GND
NC
NC
NC
C?
C?
1uF
1uF
24
23
22
21
20
19
18
17
PAD
C?
C?
R?
R?
SGTL5000
0.1uF
0.1uF
2.2k
2.2k
CTRL_CLK
CTRL_DATA
I2S_DIN
I2S_DOUT
I2S_SCLK
I2S_LRCLK
SYS_MCLK
LINE_IN_L
LINE_IN_R
1
1
C?
C?
0.1uF
0.1uF
1
2
VDDIO
MIC
MIC
X?
X?
6,7
6,7
7
7
7
7
4
4
25
D
C
B
A

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