SGTL5000XNLA3R2 Freescale Semiconductor, SGTL5000XNLA3R2 Datasheet - Page 50

• Manufacturer Part Number: SGTL5000XNLA3R2
• Description: IC AUDIO CODEC STEREO 20-QFN
• Manufacturer: Freescale Semiconductor
• Type: Stereo Audior

Specifications of SGTL5000XNLA3R2

• Data Interface: I²C, Serial, SPI™
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 100
• Voltage - Supply, Analog: 1.62 V ~ 3.6 V
• Voltage - Supply, Digital: 1.1 V ~ 2 V, 1.62 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-UFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SGTL5000
50
6.3.
End-user Driven Chip Configuration
6.3.1.
6.3.2.
6.3.3.
Write CHIP_DAC_VOL 0x3C3C
Modify CHIP_ADCDAC_CTRL->DAC_MUTE_LEFT 0x0000
Modify CHIP_ADCDAC_CTRL->DAC_MUTE_RIGHT 0x0000
// Unmute ADC
Modify CHIP_ANA_CTRL->MUTE_ADC 0x0000
End-users will control features like volume up/down, audio EQ parameters such as
Bass and Treble. This will require programming the chip without introducing any
pops/clicks or any disturbance to the output. This section shows examples on how
to program these features.
Volume and Mute Control
Refer to section 6.2.6 for examples on how to program volume when end-user
changes the volume or mutes/unmutes output. Note that the DAC volume ramp is
automatically handled by the chip.
7-Band PEQ Preset Selection
This programming example shows how to load the filter coefficients when the end-
user changes PEQ presets such as Rock, Speech, Classical etc.
// Load the 5 coefficients for each band and write them to
// appropriate filter address.
// filters (this example shows 7 filters)
for (i = 0; i < 7; i++)
{
}
5-Band GEQ Volume Change
This programming example shows how to program the GEQ volume when end-user
changes the volume on any of the 5 bands.
// Note that each 20-bit coefficient is broken into 16-bit MSB
// (unsigned short usXXMSB) and 4-bit LSB (unsigned short
// usXXLSB)
Write DAP_COEF_WR_B0_LSB
Write DAP_COEF_WR_B0_MSB
Write DAP_COEF_WR_B1_LSB
Write DAP_COEF_WR_B1_MSB
Write DAP_COEF_WR_B2_LSB
Write DAP_COEF_WR_B2_MSB
Write DAP_COEF_WR_A1_LSB
Write DAP_COEF_WR_A1_MSB
Write DAP_COEF_WR_A2_LSB
Write DAP_COEF_WR_A2_MSB
// Set the index of the filter (bits 7:0) and load the
// coeffiecents
Modify DAP_FILTER_COEF_ACCESS->INDEX (0x0101 + i)
usB0MSB[i]
usB0LSB[i]
usB1MSB[i]
usB1LSB[i]
usB2MSB[i]
usB2LSB[i]
usA1MSB[i]
usA1LSB[i]
usA2MSB[i]
usA2LSB[i]
Repeat this for all enabled
// bit 0
// bit 2
// bit 3
// bit 8
SGTL5000 EA2 DS-0-3