MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 564

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
12.7.2 Real-Time Instruction Trace
development aids for program debug. The real-time environment does not
allow program instruction execution to arbitrarily stop to handle debugging
events. These systems include control applications where mechanical events
cannot halt, such as robotics, automotive, and industrial control and emulator
systems which may need to keep the target system executing in real time.
To solve the problems inherent with real-time systems, the MC68030 incor-
systems cannot take advantage of the trace exception mechanism built into
all M68000 Family processors since this takes processing time away from
to on-chip cache memories.
the MC68030 bus activity. Since all clock cycles are not traced in a program
ternal read and write operations, trace sampling occurs when the data bus
the DSACK0 signals. Both modes of bus operation need to generate a sam-
Microprocessor-based systems used for real-time applications typically lack
porates extra hardware-based features to enhance program debug. Real-time
real-time events. Additional output pins have been incorporated into the
MC68030 to gain real-time visibility into the processor. Tracing capability can
be added by decoding MC68030 control signals to detect which cycles are
important for tracking. Post analysis of collected data allows for program
debug.
Several problems exist with an external trace mechanism. These problems
include determining which cycles are important for tracking program flow,
detecting if instructions obtained in prefetch operations are discarded by the
execution unit, and the inability of external trace circuitry to capture accesses
External trace hardware used for program debug must be synchronized to
debug environment, the trace hardware requires a sampling signal. For ex-
contains valid data. Two modes of external bus operation are possible: the
synchronous mode in which the system returns the STERM signal and the
asynchronous mode in which the system responds with the DSACK1 and or
STATtJS
REFILL
CLK
Figure 12-22. Processor Halted
MC68030 USER'S
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MANUAL
12-39
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