MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 353

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

9
9.7 R E G I S T E R S
9.7.1 R o o t P o i n t e r Registers
9-52
translation in the MC68030 are the CPU root pointer register (CRP), the su-
The supervisor root pointer (SRP), used for supervisor accesses only, is en-
the current translation table for user space (when the SRP is enabled) or for
to the CRP. A new translation table address implies that the contents of the
The SRP is a 64-bit register that optionally contains the address and related
flush the ATC. The format of the CRP and SRP is shown in Figure 9-35 and
The registers of the MMU described here are part of the supervisor pro-
The six registers that control and provide status information for address
abled or disabled in software. The CPU root pointer (CRP) corresponds to
64-bit register that contains the address and related status information of the
execution, the operating system typically writes a new root pointer descriptor
address translation cache (ATC) may no longer be valid. Therefore, the in-
struction that loads the CRP can optionally flush the ATC.
status information of the root of the translation table for supervisor area
accesses. The SRP is used when operating at the supervisor privilege level
only when the supervisor root pointer enable bit (SRE) of the translation
control register (TC) is set. The instruction that loads the SRP can optionally
defines the following fields:
gramming model for the MC68030.
pervisor root pointer register (SRP), the translation control register (TC), two
independent transparent translation control registers (TT0 and TT1), and the
MMU status register (MMUSR). These registers can be accessed directly by
programs that execute only at the supervisor level.
both user and supervisor space (when the SRP is disabled). The CRP is a
root of the translation table tree for the current task. When a new task begins
Lower/Upper (L/U)
set. When this bit is cleared, the limit field is the unsigned upper limit of
the translation table indexes.
Specifies that the value contained in the limit field is to be used as the
unsigned lower limit of indexes into the translation tables when this bit is
MC68030 USER'S MANUAL
MOTOROLA