MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 530

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
12.2 FLOATING-POINT UNITS
A feature new to the MC68030 MMU (and not on the MC68851) is the trans-
floating-point arithmetic unit and a set of floating-point data registers that
the addressing modes and data types of the host MC68030. The programmer
the MC68881 and MC68882 provide a full set of trigonometric and transcen-
The interface of the MC68030 to the MC68881 or the MC68882 is easily tailored
to system cost/performance needs. The MC68030 and the MC68881/MC68882
fers are performed by the main processor at the request of the MC68881/
the main processor. The floating-point unit and the processor may operate
Only control-alterable addressing modes are allowed for MMU instructions
on the MC68030.
parent translation of two logical address blocks with the transparent trans-
point coprocessor and the MC68882 enhanced floating-point coprocessor.
Floating-PointArithmetic
upgrade of the MC68881, with an optimized MPU interface that provides over
Both coprocessors provide a logical extension to the integer data processing
capabilities of the main processor. They contain a very high performance
are utilized in a manner that is analagous to the use of the integer data
extension of all earlier members of the M68000 Family and supports all of
perceives the MC68030/coprocessor execution model as if both devices are
dental functions, on-chip constants, and a full 80-bit extended-precision-real
data format.
communicate via standard asynchronous M68000 bus cycles. All data trans-
arbitration function as if the MC68881/MC68882 instructions are executed by
at different clock speeds, and up to seven floating-point coprocessors may
is configured to operate with a 32-bit data bus when both the A0 and SIZE
lation registers. See SECTION 9
Floating-point support for the MC68030 is provided by the MC68881 floating-
Both devices offer a full implementation of the
1.5 times the performance of the MC68881 at the same clock frequency.
registers of the processor. The MC68881/MC68882 instruction set is a natural
implemented on one chip. In addition to supporting the full IEEE standard,
MC68882; thus memory management, bus errors, address errors, and bus
reside in an MC68030 system simultaneously.
Figure 12-2 illustrates the coprocessor interface connection of an MC68881/
MC68882 to an MC68030 (uses entire 32-bit data bus). The MC68881/MC68882
MC68030 USER'S MANUAL
(754). The MC68882 is a pin and software-compatible
M E M O R Y M A N A G E M E N T
IEEE Standard for Binary
UNIT.
12-5
1,
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