MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 512

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

M O T O R O L A
11.6.16 Control instructions
for the processor to perform the specified operation. Footnotes indicate when
The control instruction table indicates the number of clock periods needed
are included in the total clock cycle number.
All timing data assumes two-clock reads and writes.
it is necessary to account for the appropriate effective address time. For
instruction-cache case and for no-cache case, the total number of clock cyclces
is outside the parentheses. The number of read, prefetch, and write cycles
is given inside the parentheses as (r p w). The read, prefetch, and write cycles
*
* + CHK
# + CHK2
# + CHK2
%
%
**
# # CAS
# # CAS
+
+
+
~*
# #
** Add
% Add Jump
+
# Add
* Add
ANDI to SR
JMP
JSR
EORI to SR
ORI to SR
ANDI to CCR
ORI to CCR
CHK
CHK
CHK
LEA
LINK.W
PEA
RTD
RTR
RTS
UNLK
EORI to CCR
BSR
LINK.L
NOP
CAS2
CAS2
Add
Indicates Maximum Time
Fetch Effective Address
Calculate Effective Address
Fetch Immediate Address
Calculate Immediate Address
Effective Address
Dn,Dn
EA,Dn
Mem,Rn (No Exception)
Mem,Rn
Dn,Dn
EA,Dn
Instruction
(No Exception)
(Exception Taken)
(No Exception)
(Exception Taken)
(Exception Taken)
(Successful Compare)
(Unsuccessful Compare)
(Successful Compare)
(Unsuccessful Compare)
M C 6 8 0 3 0 USER'S M A N U A L
Time
Time
Time
Time
Time
Head
4
0
0
4
4
4
4
4
4
2
2
2
8
4
0
0
2
2
0
2
2
0
0
2
1
1
1
1
Tail
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
I-Cache Case No-Cache Case
40(2/0/4)
24(2/0/2)
24(2/0/0)
28(1/0/4}
28(1/0/4)
18(1/0/0)
10(1/0/0)
12(2/0/0)
12(0/0/0)
12(0/0/0)
12(0/0/0)
12{0/0/0)
12(0/0/0)
12(0/0/0)
13(1/0/1)
11il/0/0)
4(0/0/1)
9(1/0/0)
5(1/0/0)
8(0/0/0)
8(0/0/0)
4(0/0/0)
4(0/0/1)
2(0/0/0)
6(0/0/1)
2(0/0/0)
4(0/0/1)
6(0/0/1)
42(23;4)
12(1 2 0)
11(1 2 0)
14(0/210/
11(1/1/0)
30(1/3/4)
30(1/3/4)
14(0/2/0)
14(0/2/0)
14(0/2/0)
26(2/2/2)
24(2/2/0)
18(1/1/0)
14(2 2 0!
14(0/2/0)
14(0/2/0)
13(1/1/1)
5(11 0i
6(0 2 0)
2(0/10)
2(0 1 0)
4(0 1 1)
8(0/1i0)
7(0121)
5(0/1 1)
7(0!2 1)
9(0/2/1)
8(0/1/0)
1 1 - 4 9
11