MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 37

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

1-8
to the value in this register to access the vector table.
the function codes for operations.
The status register, SR, (see Figure 1-4) stores the processor status. It contains
the condition codes that reflect the results of a previous operation and can
codes are extend (X), negative (N), zero (Z), overflow (V), and carry (C). The
cessor is in:
The vector base register (VBR) contains the base address of the exception
vector table in memory. The displacement of an exception vector is added
Alternate function code registers, SFC and DFC, contain 3-bit function codes.
optionally provide as many as eight 4-Gbyte address spaces. Function codes
are automatically generated by the processor to select address spaces for
data and program at the user and supervisor privilege levels and a CPU
address space for processor functions (e.g., coprocessor communications).
be used for conditional instruction execution in a program. The condition
user byte containing the condition codes is t h e only portion of the status
register information available in the user privilege level, and it is referenced
as the CCR in user programs. In the supervisor privilege level, software can
access the full status register, including the interrupt priority mask (three
bits) as well as additional control bits. These bits indicate whether the pro-
Function codes can be considered extensions of the 32-bit linear address that
Registers SFC and DFC are used by certain instructions to explicitly specify
3. Master or interrupt mode (M)
2. Supervisor or user privilege level (S)
1. One of two trace modes (T1, TO)
MASTER/INTERRUPT
SUPERVISOR/USER
STATE
STATE "
I TI
15
ENABLE
TRACE
-
TO
-
14
13
:
MC68030 USER'S MANUAL
SYSTEM BYTE
Figure 1-4. Status Register
12
F
I
I
11
0
(
PRIORITY MASK
]0
12
INTERRUPT
I1
9
I
I0
8
I
0
7
(CONDITION CODE REGISTER)
6
0
5
0
USER BYTE
I
)
3
[l_
1
-
-
0
t
MOTOROLA
CARRY
ZERO
NEGATIVE
EXTEND
OVERFLOW