N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 147

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N25Q128A11B1240E

Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet

Specifications of N25Q128A11B1240E

Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
9.3.14
DQ0
DQ3
DQ1
DQ2
S
C
Figure 88. Read Status Register instruction sequence QIO-SPI
Write status register (WRSR)
The write status register (WRSR) instruction allows new values to be written to the status
register. Before it can be accepted, a write enable (WREN) instruction must previously have
been executed.
The instruction code and the input data are sent on four pins DQ0, DQ1, DQ2 and DQ3. The
instruction functionality is exactly the same as the Write Status Register (WRSR) instruction
of the Extended SPI protocol (See
the protection feature management is different. In particular, once SRWD bit is set to '1' the
device enters in the hardware protected mode (HPM) independently from Write Protect
(W/VPP) signal value. To exit the HPM mode is needed to switch temporarily to the
Extended SPI protocol.
Instruction
0
1
2
5
4
6
7
3
1
0
2
3
4
5
4
6
7
5
1
0
2
3
6
Section 9.1.23: Write status register
5
4
6
7
Status Register Out
7
1
0
2
3
8
5
4
6
7
9 10 11 12 13 14 15
1
0
3
2
4
5
7
6
1
0
3
2
4
5
7
6
0
1
3
2
4
5
7
6
0
1
3
2
(WRSR)). However,
16 17 18
Quad_Read_SR
4
5
7
6
0
1
3
2
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