N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 139
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N25Q128A11B1240E
Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet
1.N25Q128A11B1240E.pdf
(185 pages)
Specifications of N25Q128A11B1240E
Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
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9.3.5
9.3.6
Write Disable (WRDI)
The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the four pins DQ0, DQ1, DQ2 and
DQ3, the instruction functionality is exactly the same as the Write Disable (WRDI)
instruction of the Extended SPI protocol, please refer to
(WRDI)
Figure 78. Write Disable instruction sequence QIO-SPI
Quad Command Page Program (QCPP)
The Quad Command Page Program (QCPP) instruction allows to program the memory
content in DIO-SPI protocol, parallelizing the instruction code, the address and the input
data on four pins (DQ0, DQ1, DQ2 and DQ3). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed. The Quad Command Page
Program (QCPP) instruction can be issued, when the device is set in QIO-SPI mode, by
sending to the memory indifferently one of the 3 instructions codes: 02h, 12h or 32h, the
effect is exactly the same. The 3 instruction codes are all accepted to help the application
code porting from Extended SPI protocol to QIO-SPI protocol.
Apart for the parallelizing on four pins of the instruction code, the Quad Command Page
Program instruction functionality is exactly the same as the Quad Input Extended Fast
Program of the Extended SPI protocol, please refer to
Fast Program
for further details.
for further details.
DQ0
DQ1
DQ3
DQ2
C
S
Instruction
0
1
Quad_Write_Disable
Section 9.1.15: Quad Input Extended
Section 9.1.10: Write Disable
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