N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 10

• Manufacturer Part Number: N25Q128A11B1240E
• Manufacturer: NUMONYX

Specifications of N25Q128A11B1240E

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 7ns
• Interface Type: Serial (SPI)
• Boot Type: Bottom
• Address Bus: 1b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TBGA
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 8b
• Number Of Words: 16M
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Supplier Unconfirmed

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Figure 100. Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
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Dual Command Page Program instruction sequence DSP, 02h . . . . . . . . . . . . . . . . . . . 118
Dual Command Page Program instruction sequence DSP, A2h . . . . . . . . . . . . . . . . . . . 119
Dual Command Page Program instruction sequence DSP, D2h . . . . . . . . . . . . . . . . . . . 119
Program OTP instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Subsector Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Sector Erase instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Bulk Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Program/Erase Suspend instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 122
Program/Erase Resume instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Read Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Write Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Read Lock Register instruction and data-out sequence DIO-SPI. . . . . . . . . . . . . . . . . . . 125
Write to Lock Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Read Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 126
Clear Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 127
Read NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 127
Write NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 128
Read Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 129
Write Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 129
Read Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 130
Write Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 131
Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Release from Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Multiple I/O Read Identification instruction and data-out sequence QIO-SPI . . . . . . . . . . 135
Quad Command Fast Read instruction and data-out sequence QSP, 0Bh . . . . . . . . . . . 136
Quad Command Fast Read instruction and data-out sequence QSP, 6Bh . . . . . . . . . . . 136
Quad Command Fast Read instruction and data-out sequence QSP, EBh . . . . . . . . . . . 137
Read OTP instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Write Enable instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Write Disable instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Quad Command Page Program instruction sequence QIO-SPI, 02h. . . . . . . . . . . . . . . . 140
Quad Command Page Program instruction sequence QIO-SPI, 12h. . . . . . . . . . . . . . . . 140
Quad Command Page Program instruction sequence QIO-SPI, 32h. . . . . . . . . . . . . . . . 141
Program OTP instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Subsector Erase instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Sector Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Bulk Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Program/Erase Suspend instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 145
Program/Erase Resume instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . 146
Read Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Write Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Read Lock Register instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . 149
Write to Lock Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Read Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 151
Clear Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 152
Read NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 153
Write NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 154
Read Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 155
Write Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 156
Read Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 157
Write Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 158