N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 142
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N25Q128A11B1240E
Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet
1.N25Q128A11B1240E.pdf
(185 pages)
Specifications of N25Q128A11B1240E
Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
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9.3.8
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Figure 82. Program OTP instruction sequence QIO-SPI
Subsector Erase (SSE)
For devices with a dedicated part number, at the bottom (or top) of the addressable area
there are 8 boot sectors, each one having 16 4Kbytes subsectors. (See
Ordering
the chosen subsector. Before it can be accepted, a Write Enable (WREN) instruction must
previously have been executed.
Apart form the parallelizing of the instruction code and the address on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Subsector Erase
(SSE) instruction of the Extended SPI protocol, please refer to
Erase (SSE)
S
C
DQ0
DQ2
DQ3
DQ1
information.) The Subsector Erase (SSE) instruction sets to '1' (FFh) all bits inside
Instruction
for further details.
0
1
20 16 12 8
21 17 13 9
22 18 14 10
23 19 15 11 7
2
24-Bit Address
3
4
5
6
6
5
4
7
2
1
0
3
8
6
byte1
4
5
7
Data
9 10 11 12 13 14
2
0
1
3
5
6
4
7
byte 2
Data
1
2
3
0
Quad_Program_OTP
Section 9.1.17: Subsector
byte n
5
6
4
7
Data
1
2
0
3
Section 16:
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