N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 109

• Manufacturer Part Number: N25Q128A11B1240E
• Manufacturer: NUMONYX

Specifications of N25Q128A11B1240E

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 7ns
• Interface Type: Serial (SPI)
• Boot Type: Bottom
• Address Bus: 1b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TBGA
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 8b
• Number Of Words: 16M
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.1.31
S
C
DQ0
DQ1
Figure 38. Read Volatile Configuration Register instruction sequence
Write Volatile Configuration Register
The Write Volatile Configuration register (WRVCR) instruction allows new values to be
written to the Volatile Configuration register. Before it can be accepted, a write enable
(WREN) instruction must have been executed. After the write enable (WREN) instruction
has been decoded and executed, the device sets the write enable latch (WEL).
In case of Fast POR (see section 11.1 for further details) the WREN instruction is not
required because a WREN instruction gets the device out from the Fast POR state.
The Write Volatile Configuration register (WRVCR) instruction is entered by driving Chip
Select (S) Low, followed by the instruction code and the data byte on serial data input
(DQ0).
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the Write Volatile Configuration register (WRVCR) instruction is not executed.
When the new data are latched, the write enable latch (WEL) is reset.
The Write Volatile Configuration register (WRVCR) instruction allows the user to change the
values of all the Volatile Configuration Register bits, described in
Configuration
The Write Volatile Configuration Register impacts the memory behavior right after the
instruction is received by the device.
0
High Impedance
1
2
Instruction
3
Register.
4
5
6
7
7
8
Volatile Configuration
6
9 10 11 12 13 14 15
5
Register Out
MSB
4
3
2
1
0
7
Volatile Configuration
6
5
Register Out
MSB
Table 6.: Volatile
4
3
2
1
0
7
Read_VCR
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