MC9S12XDT512MAA Freescale, MC9S12XDT512MAA Datasheet - Page 808

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MC9S12XDT512MAA

Manufacturer Part Number
MC9S12XDT512MAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512MAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.2
This section lists and describes the signals that do connect off-chip.
22.2.1
Table 22-1
“Functional Description”
810
Port
A
B
C
D
External Signal Description
Pin Name
PB[7:1]
PC[7:0]
PD[7:0]
PA[7:0]
BKGD
shows all the pins and their functions that are controlled by the PIM. Refer to
PB[0]
Signal Properties
If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority).
Pin Function
and Priority
ADDR[15:8]
DATA[15:8]
ADDR[7:1]
IVD[15:8]
DATA[7:0]
IVD[7:1]
ADDR[0]
MODC
BKGD
IVD0
GPIO
GPIO
GPIO
GPIO
GPIO
UDS
mux
mux
mux
Table 22-1. Pin Functions and Priorities (Sheet 1 of 7)
for the availability of the individual pins in the different package options.
2
1
2
2
MC9S12XDP512 Data Sheet, Rev. 2.21
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
MODC input during RESET
S12X_BDM communication pin
High-order external bus address output
(multiplexed with IVIS data)
General-purpose I/O
Low-order external bus address output
(multiplexed with IVIS data)
General-purpose I/O
Low-order external bus address output
(multiplexed with IVIS data)
Upper data strobe
General-purpose I/O
High-order bidirectional data input/output
Configurable for reduced input threshold
General-purpose I/O
Low-order bidirectional data input/output
Configurable for reduced input threshold
General-purpose I/O
NOTE
Description
Freescale Semiconductor
Section 22.4,
Pin Function
after Reset
dependent
dependent
dependent
dependent
BKGD
Mode
Mode
Mode
Mode
3
3
3
3

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