MC9S12XDT512MAA Freescale, MC9S12XDT512MAA Datasheet - Page 195

no-image

MC9S12XDT512MAA

Manufacturer Part Number
MC9S12XDT512MAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512MAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDT512MAA
Manufacturer:
FREESCALE
Quantity:
2 546
Part Number:
MC9S12XDT512MAA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDT512MAA
Manufacturer:
FREESCALE
Quantity:
2 546
6.3.1.5
The eight software triggers of the XGATE module can be set and cleared through the XGATE software
trigger register
access to the lower byte, the software trigger bits. These bits can be set or cleared if a "1" is written to the
associated mask in the same bus cycle.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
XGSWTM[7:0]
XGSWT[7:0]
W
R
Field
15–8
7–0
15
0
0
XGATE Software Trigger Register (XGSWT)
Software Trigger Mask — These bits control the write access to the XGSWT bits. Each XGSWT bit can only
be written if a "1" is written to the corresponding XGSWTM bit in the same access.
Read:
These bits will always read "0".
Write:
0 Disable write access to the XGSWT in the same bus cycle
1 Enable write access to the corresponding XGSWT bit in the same bus cycle
Software Trigger Bits — These bits act as interrupt flags that are able to trigger XGATE software channels.
They can only be set and cleared by software.
Read:
0 No software trigger pending
1 Software trigger pending if the XGIE bit is set
Write:
0 Clear Software Trigger
1 Set Software Trigger
14
0
0
The XGATE channel IDs that are associated with the eight software triggers
are determined on chip integration level. (see Section “Interrupts” of the Soc
Guide)
XGATE software triggers work like any peripheral interrupt. They can be
used as XGATE requests as well as S12X_CPU interrupts. The target of the
software trigger must be selected in the S12X_INT module.
(Figure
13
0
0
6-7). The upper byte of this register, the software trigger mask, controls the write
XGSWTM[7:0]
Figure 6-7. XGATE Software Trigger Register (XGSWT)
12
0
0
11
0
0
Table 6-5. XGSWT Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
10
0
0
0
0
9
NOTE
0
0
8
Description
7
0
0
6
0
5
XGSWT[7:0]
0
4
Chapter 6 XGATE (S12XGATEV2)
0
3
2
0
0
1
0
0
195

Related parts for MC9S12XDT512MAA