FW82801EB Intel, FW82801EB Datasheet - Page 94

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
5.2.2.4
94
PCI Reset Signal
The PCIRST# signal may be activated in one of the following cases:
If PME is enabled (in the PCI power management registers), PCIRST# assertion does not affect
any PME related circuits (in other words, PCI power management registers and the wake-up packet
would not be affected). While PCIRST# is active, the LAN controller ignores other PCI signals.
The configuration of the LAN controller registers associated with ACPI wake events is not affected
by PCIRST#.
The integrated LAN controller uses the PCIRST# or the PWROK signal as an indication to ignore
the PCI interface. Following the deassertion of PCIRST#, the LAN controller PCI Configuration
Space, MAC configuration, and memory structure are initialized while preserving the PME# signal
and its context.
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D2 Power State
The ACPI D2 power state is similar in functionality to the D1 power state. In addition to D1
functionality, the LAN controller can provide a lower power mode with wake-on-link status
change capability. The LAN controller may enter this mode if the link is down while the LAN
controller is in the D2 state. In this state, the LAN controller monitors the link for a transition
from an invalid to a valid link.
The sub-10 mA state due to an invalid link can be enabled or disabled by a configuration bit in
the Power Management Driver Register (PMDR). The LAN controller will consume in
D2 <10 mA, regardless of the link status. It is the LAN Connect component that consumes
much less power during link down; hence, the LAN controller in this state can consume
<10 mA.
D3 Power State
In the D3 power state, the LAN controller has the same capabilities and consumes the same
amount of power as it does in the D2 state. However, it enables the PCI system to be in the B3
state. If the PCI system is in the B3 state (in other words, no PCI power is present), the LAN
controller provides wake-up capabilities. If PME is disabled, the LAN controller does not
provide wake-up capability or maintain link integrity. In this mode the LAN controller
consumes its minimal power.
The LAN controller enables a system to be in a sub-5 Watt state (low-power state) and still be
virtually connected. More specifically, the LAN controller supports full wake-up capabilities
while it is in the D3 cold state. The LAN controller is in the ICH5 resume well, which enables
it to provide wake-up functionality while the PCI power is off.
During S3–S5 states
Due to a CF9h reset
Intel
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82801EB ICH5 / 82801ER ICH5R Datasheet