FW82801EB Intel, FW82801EB Datasheet - Page 391
FW82801EB
Manufacturer Part Number
FW82801EB
Description
Manufacturer
Intel
Datasheet
1.FW82801EB.pdf
(671 pages)
Specifications of FW82801EB
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Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Bit
7:5
3:1
4
0
THRM_DTY — WO. This write-once field determines the duty cycle of the throttling when the
thermal override condition occurs. The duty cycle indicates the approximate percentage of time the
STPCLK# signal is asserted while in the throttle mode. The STPCLK# throttle period is
1024 PCICLKs. Note that the throttling only occurs if the system is in the C0 state.
There is no enable bit for thermal throttling, because it should not be disabled. Once the
THRM_DTY field is written, any subsequent writes will have no effect until PCIRST# goes active.
THRM_DTY Throttle Mode
000
001
010
011
100
101
110
111
THTL_EN — R/W. When set and the system is in a C0 state, it enables a processor-controlled
STPCLK# throttling. The duty cycle is selected in the THTL_DTY field.
0 = Disable
1 = Enable
THTL_DTY — R/W. This field determines the duty cycle of the throttling when the THTL_EN bit is
set. The duty cycle indicates the approximate percentage of time the STPCLK# signal is asserted
(low) while in the throttle mode. The STPCLK# throttle period is 1024 PCICLKs.
THTL_DTY
000
001
010
011
100
101
110
111
Reserved
50% (Default)
87.5%
75.0%
62.5%
50%
37.5%
25%
12.5%
Throttle Mode
50% (Default)
87.5%
75.0%
62.5%
50%
37.5%
25%
12.5%
PCI Clocks
512
896
768
640
512
384
256
128
PCI Clocks
512
896
768
640
512
384
256
128
Description
LPC Interface Bridge Registers (D31:F0)
391
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