TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 49

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

4 9 o f 2 2 6
MPINTR
MPACK
MPD15
MPD14
MPD13
MPD12
MPD10
MPD09
MPD08
MPD07
MPD06
MPD05
MPD04
MPD03
MPD02
MPD01
MPD00
MPSEL
MPD11
MPWR
MPTS
G3
G2
G1
H4
F1
H3
H2
H1
K4
K3
K2
K1
B3
J4
J3
J2
J1
L4
L3
L2
L1
I/O(T)
O(T) LVCMOS
O
I
I
I
LVCMOS
LVCMOS
LVTTL/
LVTTL PHAST-12P Chip Select (Active Low): This active low
LVTTL Data Strobe (Active Low): This active low lead initiates
LVTTL Read/Write (Active Low): This active low lead indicates
- Lead Descriptions -
24mA
8mA
8mA
Data Bus: These leads are the bidirectional data bus
used for transferring data between the PHAST-12P and
the host processor.
MPD15 is the most significant bit.
Motorola notation: D[ ]
lead enables data transfers between the host processor
and the PHAST-12P through a read or write cycle.
Motorola notation: CS
a (read or write) transfer between the host processor and
the PHAST-12P.
Motorola notation: DS
that the actual transfer between the host processor and
the PHAST-12P is a write transfer.
Motorola notation: R/W
Data Transfer Acknowledge: For a write access, an
active edge on this lead indicates that data is written to the
addressed memory location. For a read access, an active
edge on this lead indicates that the data to be read from
the addressed memory location is available on the data
bus.
Active level depends on MPACKLEVEL.
Motorola notation: DSACK
Interrupt Request: This lead signals an interrupt request
to the host processor.
Active level depends on MPINTLEVEL.
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005