TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 141

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

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1. PPP octet boundaries are aligned with SDH High Order VC/SONET STS-SPE byte boundaries.
11.13 PPP PACKET HANDLING
The PHAST-12P performs the following PPP PHY layer functions:
The PHAST-12P will support octet-synchronous
frames into and from SDH/SONET, as specified in [RFC2615] and [RFC1662].
Up to 12 PPP streams can be handled concurrently. Following modes are supported:
The PHAST-12P does not support Async-Control-Character-Map (ACCM) handling.
• Egress: PPP packet demapping from SDH/SONET streams
• Ingress: PPP packet mapping into SDH/SONET streams
• Descrambling
• Address/Control fields checking and stripping
• HDLC framing and byte destuffing (including escape character discarding)
• FCS checking and stripping
• 32/16 bit FCS
• Rx FIFO overflow detection
• Discarding of too short and too long frames
• Discarding of frames with abort sequence
• Frames with FCS error are not discarded, but passed to the POS-PHY interface with
• Performance counters
• Optional Transparent mapping
• Address/Control fields insertion
• FCS insertion
• 32/16 bit FCS
• HDLC flag insertion and byte stuffing (including escape character insertion)
• Optional multiple flag insertion
• Scrambling
• Tx FIFO underflow detection
• Detection of errored packets and insertion of abort sequence
• Performance counters
• Optional Transparent mapping
• One VC-4-4C/STS-12c, corresponding to one PHY
• Four VC-4/STS-3c, corresponding to four PHY’s
• 12 VC-3/STS-1, corresponding to 12 PHY’s
- High Order Pointer Tracking, Retiming and Pointer Generation -
the RXERR signal asserted
1
mapping and demapping of HDLC-like PPP
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005