HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 98

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
6.3.1
6.3.1.1
07-Oct-2005
98
®
Figure 28. Packet Buffering FIFO
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Note:
TX FIFO
The IXF1110 MAC TX FIFOs are implemented with 4.5 KB for each port. This provides enough
space for at least one maximum size packet per-port storage and ensures that no under-run
conditions occur, assuming that the sending device can supply data at the required data rate.
The TX FIFO High and Low Watermark must be programmed correctly to ensure that the TX FIFO
does not overflow.
MAC Transfer Threshold
The
programmable, determines when data is transmitted out of the TX FIFO to the MAC. This
parameter is configurable for specific block sizes and the user must ensure that an under-run does
not occur. The threshold must be set to a value that exceeds the programmed MaxBurst1 parameter
from the Network Processor (NPU) or SPI4-2 ASIC. This method of operation eliminates the
possibility of under-run, except when the controlling NPU device fails.
The MAC transfer threshold operates on a per packet basis. Once the number of bytes of a packet
received in the TX FIFO exceeds the MAC transfer threshold, it will start to be transmitted to the
MAC. If the MAC transfer is greater than the packet size, the packet is sent to the MAC once an
EOP is received.
NOTE: The MAC Transfer Threshold determines when the transmit data is transferred from the TX
“TX FIFO MAC Transfer Threshold Ports 0 to 9 ($ 0x614 - 0x61D)”
SPI4-2 Interface
High Water Mark
MAC Transfer
Threshold *
Low Water Mark
High Water Mark
Low Water Mark
TxPauseFr (External
FIFO to the TX side of the MAC. Once the data has been sent from the TX FIFO to the MAC, it
will be transmitted to the PHY and cannot be flow controlled from the link partner.
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
strobe)
Order Number: 250210, Revision: 009
TX FIFO
RX FIFO
802.3 Flow
control
RX FIFO High
Data Flow
Data Flow
802.3x Pause Frame Generation
TX Side
MAC
RX Side
MAC
parameter, which is user
MDI
Datasheet