HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 22

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
07-Oct-2005
22
®
Table 1.
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
SPI4-2 Interface Signal Descriptions (Sheet 2 of 2)
RDAT15_P, RDAT15_N
RDAT14_P, RDAT14_N
RDAT13_P, RDAT13_N
RDAT12_P, RDAT12_N
RDAT11_P, RDAT11_N
RDAT10_P, RDAT10_N
RDAT9_P, RDAT9_N
RDAT8_P, RDAT8_N
RDAT7_P, RDAT7_N
RDAT6_P, RDAT6_N
RDAT5_P, RDAT5_N
RDAT4_P, RDAT4_N
RDAT3_P, RDAT3_N
RDAT2_P, RDAT2_N-
RDAT1_P, RDAT1_N
RDAT0_P, RDAT0_N
RDCLK_P
RDCLK_N
RCTL_P
RCTL_N
RSCLK
RSTAT1
RSTAT0
Signal Name
Intel
®
IIXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Order Number: 250210, Revision: 009
K12
F16
E13
A13
J16
G17
D18
C16
M15
E16
L17
J18
G21
F18
B20
E19
C18
C19
H16
H18
J17
J20
L20
Ball Designator
K13
G16
E14
A14
K15
G18
E18
D16
N15
E17
L18
J19
H20
G19
C20
E20
Output
Output
Output
Input
Input
Type
LVDS
LVDS
LVDS
2.5 V
LVTTL
2.5 V
LVTTL
Standard
Receive Data: Carries payload
data and in-band control from the
IXF1110 link-layer device.
Internally terminated differentially
with 100
Receive Data Clock: Clock
associated with RDAT[15:0] and
RCTL. Data and control lines are
driven off the rising and falling
edges of the clock.
The frequency range is
320-400 Mhz. Frequency is always
a multiplied- by-8 version of the
CLK50 reference clock.
Internally terminated differentially
with 100
Receive Control: RCTL is High
when a control word is present on
RDAT[15:0]. Otherwise, RCTL is
Low.
Internally terminated differentially
with 100
Receive Status Clock: The clock
associated with RSTAT[1:0].
Receive FIFO Status: Carries
round-robin FIFO status
information, along with associated
error detection and framing.
Signal Description
Datasheet