HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 81

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Figure 18. Acknowledge Timing
5.4.4.4.4 Memory Reset
After an interruption in protocol, power loss, or system reset, any two-wire Optical Module can be
reset by following three steps:
The following defines device memory reset:
5.4.4.4.5 Device Addressing
All E
condition to enable the chip to read or write. The device address word consists of a mandatory one,
zero sequence for the four most significant bits. This is common to all devices. The next 3 bits are
the A2, A1 and A0 device address bits that are tied to zero in a optical module. The eighth bit of the
device address is the Read/Write operation select bit. A Read operation is initiated if this bit is
High and a Write operation is initiated if this bit is Low.
Upon comparison of the device address, the optical module outputs a zero. If a comparison is not
made, the optical module E
When not accessing the optical module E
programmable for maximum flexibility.
5.4.4.4.6 Random Read Operation
A random Read requires a “dummy” Byte/Write sequence to load the data word address. The
following describes how to achieve the “dummy” Write:
1. Clock up to nine cycles
2. Wait for I
3. Initiate a start condition
•
Always add a stop condition following the start as there is no clean finish to end the reset of
the memory with a start condition after completing steps one through three. This ensures a
clean protocol termination if there is no more data to transfer at the end of the reset cycle.
2
DATA OUT
PROMs in Optical Module devices require an 8-bit device address word following a start
I
2
C_DATA
DATA IN
Intel
2
®
C_DATA High in each cycle while I
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
START
Order Number: 250210, Revision: 009
2
PROM returns to a standby state.
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
2
PROM, the device address or device ID is completely
2
C_CLK is High
ACKNOWLEDGE
07-Oct-2005
81