HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 11

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HFIXF1110CC.B2 Q E000

Manufacturer Part Number
HFIXF1110CC.B2 Q E000
Description
Manufacturer
Intel
Datasheet

Specifications of HFIXF1110CC.B2 Q E000

Number Of Transceivers
1
Screening Level
Commercial
Mounting
Surface Mount
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Lead Free Status / RoHS Status
Not Compliant
Datasheet
Page #
Page #
Page #
126
170
154
163
176
136
NA
NA
17
18
30
31
34
36
43
43
44
46
46
52
52
56
1
Intel
Modified Table 72 “RX Packet Filter Control ($ Port_Index + 0x19)” (removed table note from the
bit 4 description].
Modified Table 114 “SPI4-2 RX Calendar ($ 0x702)” [changed Register bits 3:0 to Reserved].
Modified Table 88 “JTAG ID Revision ($ 0x50C)” [added table note 2].
Added Table 105 “TX FIFO Drain ($0x620)”.
Modified Table 116 “Intel
number to reflect B2].
Deleted old Table 19: 1x9-to-IXF1110 Connection
Modified text under Section 6.5, “SerDes Power-Down Capabilities (IXF1110 Only)”.
Changed Table 98: TX FIFO Port Reset Register (Addr: 0x620) to Reserved.
Added product ordering and operating temperature range information, and changed SFF-8053,
Revision 5.5 Compatible to SFP MSA compatible.
Deleted old Figures 6, 7, and 8 (Revision 004) and replaced with Figure 6 “Intel
CBGA Assignments (Top View)”
Added new Section 3.1, “Intel
in Alphanumeric Order by Signal Name” and Table 2 “Intel
Order by Ball Location”.
Modified Figure 4 “Intel® IXF1110 Interface Diagram”.
Broke up old Table 3 into Table 3 “Intel
Table 12 “Intel
Modified Table 5 “Intel
Modified Table 7 “Intel
Added note under Section 5.1.2.3.5, “Filter PAUSE Packets”.
Added note under Section 5.1.2.3.6, “Filter CRC Errored Packets”.
Added third note to Section 5.1.3, “Fiber Operation”.
Modified text and added note under Section 5.1.4, “Fiber Auto-Negotiation”.
Modified Section 5.1.5, “Forced Mode Operation”
Modified Figure 6 “Intel
Engine”.
Added Table 17 “Intel
Added new Section 5.2.1.2, “EOP Abort”.
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
®
Order Number: 250210, Revision: 009
IXF1110 System Interface Signal Descriptions”.
®
®
®
®
IXF1110 SPI4-2 Interface Signal Summary”.
Revision Number: 007 (Sheet 2 of 2)
Revision Number: 005 (Sheet 1 of 3)
IXF1110 CPU Interface Signal Descriptions”.
IXF1110 Optical Module Interface Signal Descriptions”.
®
Revision Date: December 30, 2003
Revision Date: November 24, 2003
IXF1110 SPI4-2 Interfacing with the Network Processor or Forwarding
IXF1010 MAC Product Information” [changed part number and MM
Intel
Revision Date: May 5, 2004
®
Revision Number: 006
IXF1110 Ball List Tables” including Table 1 “Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
®
IXF1110 SPI4-2 Interface Signal Descriptions” through
Description
Description
Description
®
IXF1110 Ball List in Alphanumeric
®
®
IXF1110 552-Ball
IXF1110 Ball List
07-Oct-2005
11

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