XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 45

• Manufacturer Part Number: XC5VLX220-1FF1760I
• Description: FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

• Package: 1760FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 221184
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 800
• Ram Bits: 7077888
• Number Of Logic Elements/cells: 221184
• Number Of Labs/clbs: 17280
• Total Ram Bits: 7077888
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1760-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
• Number Of Gates: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

X-Ref Target - Figure 1-22
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Clock Capable I/O
BUFR Use Models
I/O Tile
I/O Tile
I/O Tile
I/O Tile
I/O Tile
I/O Tile
I/O Tile
I/O Tile
BUFRs are ideal for source-synchronous applications requiring clock domain crossing or
serial-to-parallel conversion. Unlike BUFIOs, BUFRs are capable of clocking logic
resources in the FPGAs other than the IOBs.
Figure 1-22: BUFR Driving Various Logic Resources
BUFIO
BUFR
www.xilinx.com
To Region
Above
To Region
Below
Figure 1-22
CLBs
CLBs
CLBs
CLBs
CLBs
CLBs
CLBs
CLBs
is a BUFR design example.
Block
Block
RAM
RAM
Regional Clocking Resources
DSP
DSP
Tile
Tile
UG190_c1_22_022609
To Center
of Die
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