XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 317

FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA

XC5VLX220-1FF1760I

Manufacturer Part Number
XC5VLX220-1FF1760I
Description
FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

Package
1760FCBGA
Family Name
Virtex®-5
Device Logic Units
221184
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
800
Ram Bits
7077888
Number Of Logic Elements/cells
221184
Number Of Labs/clbs
17280
Total Ram Bits
7077888
Number Of I /o
800
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1760-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX220-1FF1760I
Manufacturer:
Xilinx Inc
Quantity:
10 000
SelectIO Logic Resources
Introduction
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
This chapter describes the logic directly behind the I/O drivers and receivers covered in
Chapter 6, SelectIO
Virtex-5 FPGAs contain all of the basic I/O logic resources from Virtex-II/Virtex-II Pro
FPGAs. These resources include the following:
In addition, Virtex-5 FPGAs implement the following architectural features that are also
supported in Virtex-4 FPGAs:
Combinatorial input/output
3-state output control
Registered input/output
Registered 3-state output control
Double-Data-Rate (DDR) input/output
DDR output 3-state control
IODELAY provides users control of an adjustable, fine-resolution delay element
SAME_EDGE output DDR mode
SAME_EDGE and SAME_EDGE_PIPELINED input DDR mode
Resources.
www.xilinx.com
Chapter 7
317

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