XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 229

• Manufacturer Part Number: XC5VLX220-1FF1760I
• Description: FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

• Package: 1760FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 221184
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 800
• Ram Bits: 7077888
• Number Of Logic Elements/cells: 221184
• Number Of Labs/clbs: 17280
• Total Ram Bits: 7077888
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1760-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
• Number Of Gates: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 6-3: Virtex-5 Device DCI I/O Standards
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
LVDCI
HSLVDCI
LVDCI_DV2 HSTL_II_DCI
GTL_DCI
GTLP_DCI
DCI in Virtex-5 Device I/O Standards
HSTL_I_DCI
HSTL_I_DCI_18
HSTL_II_DCI_18
HSTL_II_T_DCI
HSTL_II_T_DCI_18
Figure 6-15
X-Ref Target - Figure 6-15
DCI works with single-ended I/O standards. DCI supports the standards shown in
Table
To correctly use DCI in a Virtex-5 device, users must follow the following rules:
1.
2.
3.
V
IOSTANDARDs in that bank.
Correct DCI I/O buffers must be used in the software either by using IOSTANDARD
attributes or instantiations in the HDL code.
Some DCI standards require connecting the external reference resistors to the
multipurpose pins (VRN and VRP) in the bank. Where this is required, these two
multipurpose pins cannot be used as general-purpose I/O. Refer to the Virtex-5 FPGA
pinout tables for the specific pin locations. Pin VRN must be pulled up to V
reference resistor. Pin VRP must be pulled down to ground by its reference resistor.
Some DCI standards do not require connecting the external reference resistors to the
VRP/VRN pins. When these DCI-based I/O standards are the only ones in a bank, the
the VRP and VRN pins in that bank can be used as general-purpose I/O.
Figure 6-15: Driver with Termination to V
CCO
6-3.
DIFF_HSTL_I_DCI
DIFF_HSTL_I_DCI_18
DIFF_HSTL_II_DCI
DIFF_HSTL_II_DCI_18 HSTL_IV_DCI_18
pins must be connected to the appropriate V
illustrates a driver with split termination inside a Virtex-5 device.
www.xilinx.com
HSTL_III_DCI
HSTL_IV_DCI
HSTL_III_DCI_18
Virtex-5 DCI
V
CCO
2R
2R
IOB
SelectIO Resources General Guidelines
CCO
SSTL2_I_DCI
SSTL2_II_DCI
SSTL18_I_DCI
SSTL18_II_DCI
SSTL2_II_T_DCI
SSTL18_II_T_DCI
/2 Using DCI Split Termination
Z
CCO
UG190_6_13_021206
0
voltage based on the
DIFF_SSTL2_I_DCI
DIFF_SSTL2_II_DCI
DIFF_SSTL18_I_DCI
DIFF_SSTL18_II_DCI
CCO
by its
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