XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 161

• Manufacturer Part Number: XC5VLX220-1FF1760I
• Description: FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

• Package: 1760FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 221184
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 800
• Ram Bits: 7077888
• Number Of Logic Elements/cells: 221184
• Number Of Labs/clbs: 17280
• Total Ram Bits: 7077888
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1760-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
• Number Of Gates: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM and FIFO ECC Primitive
Figure 4-29
FIFO36_72 ECC primitive. The FIFO36_72 only supports standard mode.
X-Ref Target - Figure 4-29
X-Ref Target - Figure 4-30
shows the block RAM (RAMB36SDP) ECC primitive.
Figure 4-29: RAMB36SDP: Block RAM ECC Primitive
Figure 4-30: FIFO36_72: FIFO ECC Primitive
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DI[63:0]
DIP[7:0]
(Decode Only)
WRADDR[8:0]
RDADDR[8:0]
WREN
RDEN
SSR
WRCLK
RDCLK
DI[63:0]
DIP[7:0]
WREN
RDEN
RST
WRCLK
RDCLK
RAMB36SDP
FIFO36_72
ECCPARITY[7:0]
ECCPARITY[7:0]
ALMOSTEMPTY
WRCOUNT[8:0]
RDCOUNT[8:0]
ALMOSTFULL
Encode Only)
(Standard or
DBITERR
SBITERR
SBITERR
DBITERR
DOP[7:0]
DO[63:0]
DOP[7:0]
DO[63:0]
WRERR
RDERR
EMPTY
FULL
ug190_4_26_022207
ug190_4_34_022207
Built-in Error Correction
Figure 4-30
shows the
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