XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 241

FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA

XC5VLX220-1FF1760I

Manufacturer Part Number
XC5VLX220-1FF1760I
Description
FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

Package
1760FCBGA
Family Name
Virtex®-5
Device Logic Units
221184
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
800
Ram Bits
7077888
Number Of Logic Elements/cells
221184
Number Of Labs/clbs
17280
Total Ram Bits
7077888
Number Of I /o
800
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1760-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX220-1FF1760I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
LVCMOS (Low Voltage Complementary Metal Oxide Semiconductor)
Table 6-5
Table 6-5: Allowed Attributes for the LVTTL I/O Standard
LVCMOS is a widely used switching standard implemented in CMOS transistors. This
standard is defined by JEDEC (JESD 8-5). The LVCMOS standards supported in Virtex-5
FPGAs are: LVCMOS12, LVCMOS15, LVCMOS18, LVCMOS25, and LVCMOS33.
Sample circuits illustrating both unidirectional and bidirectional LVCMOS termination
techniques are shown in
X-Ref Target - Figure 6-29
IOSTANDARD
DRIVE
SLEW
Attributes
details the allowed attributes that can be applied to the LVTTL I/O standard.
LVCMOS
LVCMOS
LVCMOS
Figure 6-29: LVCMOS Unidirectional Termination
IOB
IOB
IOB
Note: V
Figure 6-29
www.xilinx.com
R S = Z 0 – R D
TT
IBUF/IBUFG
is any voltage from 0V to V CCO
UNUSED
UNUSED
LVTTL
R P = Z 0
Z 0
Z 0
and
Specific Guidelines for I/O Supported Standards
Z 0
V
Figure
TT
6-30.
2, 4, 6, 8, 12, 16, 24
IOB
IOB
IOB
LVCMOS
LVCMOS
LVCMOS
OBUF/OBUFT
{FAST, SLOW}
Primitives
LVTTL
ug190_6_26_022806
2, 4, 6, 8, 12, 16, 24
{FAST, SLOW}
IOBUF
LVTTL
241

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