SI1014-A-GM Silicon Laboratories Inc, SI1014-A-GM Datasheet - Page 262

IC TXRX MCU + EZRADIOPRO

SI1014-A-GM

Manufacturer Part Number
SI1014-A-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI1014-A-GM

Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
13dBm
Sensitivity
-121dBm
Voltage - Supply
0.9 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Memory Size
16kB Flash, 768B RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
13 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
768 B
Supply Current (max)
4 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1869-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI1014-A-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
Si1010/1/2/3/4/5
23.4.2. Modulation Data Source
The transceiver may be configured to obtain its modulation data from one of three different sources: FIFO
mode, Direct Mode, and from a PN9 mode. In Direct Mode, the TX modulation data may be obtained from
several different input pins. These options are set through the dtmod[1:0] field in "Register 71h. Modulation
Mode Control 2".
23.4.2.1. FIFO Mode
In FIFO mode, the transmit and receive data is stored in integrated FIFO register memory. The FIFOs are
accessed via "Register 7Fh. FIFO Access," and are most efficiently accessed with burst read/write opera-
tion.
In TX mode, the data bytes stored in FIFO memory are "packaged" together with other fields and bytes of
information to construct the final transmit packet structure. These other potential fields include the Pream-
ble, Sync word, Header, CRC checksum, etc. The configuration of the packet structure in TX mode is
262
Add R/W
dtmod[1:0]
71
TX Modulation Time Domain Waveforms -- FSK vs. GFSK
-0.5
-1.0
-1.5
-0.5
-1.0
1.5
1.0
0.5
0.0
1.0
0.5
0.0
00
01
10
11
R/W
0
50
Description
Function/
Modulation
100
Direct Mode using TX/RX Data via GPIO pin (GPIO configuration required)
Direct Mode using TX/RX Data via SDI pin (only when nSEL is high)
FIFO Mode
PN9 (internally generated)
Control 2
Mode
150
200
time, usec
250
trclk[1] trclk[0] dtmod[1] dtmod[0] eninv fd[8] modtyp[1] modtyp[0]
Figure 23.6. FSK vs. GFSK Spectrums
D7
300
350
D6
400
450
D5
500
Rev. 1.0
Data Source
-100
-100
TX Modulation Spectrum -- FSK vs GFSK (Continuous PRBS)
-20
-40
-60
-80
-20
-40
-60
-80
D4
-250
DataRate
-200
64000.0
D3
-150
-100
D2
TxDev
32000.0
-50
freq, KHz
D1
0
BT_Filter
50
0.5
100
D0
ModIndex
150
1.0
200
POR Def.
00h
250

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