SI1014-A-GM Silicon Laboratories Inc, SI1014-A-GM Datasheet - Page 215

• Manufacturer Part Number: SI1014-A-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1014-A-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 16kB Flash, 768B RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 768 B
• Supply Current (max): 4 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1869-5

Internal Register Definition 20.4. RTC0CN: SmaRTClock Control
SmaRTClock Address = 0x04
Note: The ALRM flag will remain asserted for a maximum of one SmaRTClock cycle. See Section “Power
Name
Reset
Type
Bit
7
6
5
4
3
2
1
0
Bit
RTC0AEN SmaRTClock Alarm Enable.
RTC0CAP SmaRTClock Timer Capture.
RTC0SET SmaRTClock Timer Set.
Management” on page 157 for information on how to capture a SmaRTClock Alarm event using a flag which
is not automatically cleared by hardware.
MCLKEN Missing SmaRTClock Detector Enable.
OSCFAIL SmaRTClock Oscillator Fail Event Flag.
RTC0EN SmaRTClock Enable.
RTC0TR SmaRTClock Timer Run Control.
ALRM
Name
RTC0EN
R/W
7
0
Enables/disables the SmaRTClock oscillator and associated bias currents.
0: SmaRTClock oscillator disabled.
1: SmaRTClock oscillator enabled.
Enables/disables the missing SmaRTClock detector.
0: Missing SmaRTClock detector disabled.
1: Missing SmaRTClock detector enabled.
Set by hardware when a missing SmaRTClock detector timeout occurs. Must be
cleared by software. The value of this bit is not defined when the SmaRTClock 
oscillator is disabled.
Controls if the SmaRTClock timer is running or stopped (holds current value).
0: SmaRTClock timer is stopped.
1: SmaRTClock timer is running.
Enables/disables the SmaRTClock alarm function. Also clears the ALRM flag.
0: SmaRTClock alarm disabled.
1: SmaRTClock alarm enabled.
SmaRTClock Alarm Event
Flag and Auto Reset
Enable.
Reads return the state of the
alarm event flag.
Writes enable/disable the 
Auto Reset function.
Writing 1 initiates a SmaRTClock timer set operation. This bit is cleared to 0 by hard-
ware to indicate that the timer set operation is complete.
Writing 1 initiates a SmaRTClock timer capture operation. This bit is cleared to 0 by
hardware to indicate that the timer capture operation is complete.
MCLKEN
R/W
6
0
OSCFAIL
Varies
R/W
5
RTC0TR
R/W
Rev. 1.0
Read:
0: SmaRTClock alarm
event flag is de-asserted.
1: SmaRTClock alarm
event flag is asserted.
4
0
Function
RTC0AEN
R/W
3
0
ALRM
Si1010/1/2/3/4/5
R/W
2
0
Write:
0: Disable Auto Reset.
1: Enable Auto Reset.
RTC0SET RTC0CAP
R/W
1
0
R/W
0
0
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