R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 710

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14. Direct Memory Access Controller (DMAC)
14.3.4
DARB are 32-bit readable/writable registers that specify the destination address of a DMA
transfer that is set in DAR again in repeat/reload mode. The data written to DAR by the CPU is
also written to DARB. To set the address that is different from DAR address, write data to DAR,
then, to DARB.
A word or longword boundary address should be specified when a word or longword transfer is
performed respectively. A 16-byte or 32-byte boundary value should be specified when a 16-byte
or 32-byte transfer is performed respectively.
The initial value of DARB is undefined.
Rev.1.00 Jan. 10, 2008 Page 678 of 1658
REJ09B0261-0100
Initial value:
Initial value:
R/W:
R/W:
BIt:
BIt:
DMA Destination Address Registers B0 to B3, B6 to B9 (DARB0 to DARB3,
DARB6 to DARB9)
R/W
R/W
31
15
R/W
R/W
30
14
R/W
R/W
29
13
R/W
R/W
28
12
R/W
R/W
27
11
R/W
R/W
26
10
R/W
R/W
25
9
R/W
R/W
24
8
R/W
R/W
23
7
R/W
R/W
22
6
R/W
R/W
21
5
R/W
R/W
20
4
R/W
R/W
19
3
R/W
R/W
18
2
R/W
R/W
17
1
R/W
R/W
16
0

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