R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 516
R8A77850BDBGV#RD0Z
Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850BDBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Manufacturer
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12. DDR2-SDRAM Interface (DBSC2)
12.4.3
The SDRAM command control register (DBCMDCNT) is a readable/writable register. It is
initialized only upon power-on reset. The CMD2 to CMD0 bits in DBCMDCNT are always read
as 000.
Initial value:
Initial value:
Rev.1.00 Jan. 10, 2008 Page 484 of 1658
REJ09B0261-0100
Bit
31 to 3
R/W:
R/W:
BIt:
BIt:
SDRAM Command Control Register (DBCMDCNT)
Bit Name
⎯
31
15
⎯
⎯
R
R
0
0
30
14
⎯
⎯
R
R
0
0
29
⎯
13
⎯
R
R
0
0
Initial
Value
All 0
28
12
⎯
⎯
R
R
0
0
27
11
⎯
⎯
R
R
0
0
R/W
R
26
10
⎯
⎯
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
25
⎯
⎯
R
R
0
9
0
24
⎯
⎯
R
R
0
8
0
23
⎯
⎯
R
R
0
7
0
22
⎯
⎯
R
R
0
6
0
21
⎯
⎯
R
R
0
5
0
20
⎯
⎯
R
R
0
4
0
19
⎯
⎯
R
R
0
3
0
CMD2
R/W
18
⎯
R
0
0
2
CMD1
R/W
17
⎯
R
0
1
0
CMD0
R/W
16
⎯
R
0
0
0
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