R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 642

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

13. PCI Controller (PCIC)
(12) PCI Arbiter Bus Master Information Register (PCIBMIR)
In host mode, this register records when the interrupt is generated by PCIAINT. When multiple
interrupts occur, only the first source is registered. When an interrupt is disabled, the source is
registered in the corresponding bit, and no interrupt occurs.
Rev.1.00 Jan. 10, 2008 Page 610 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
2
1
0
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
Bit:
Bit:
Bit Name
MAIM
RDPEIM
WDPEIM
31
15
—
—
R
R
R
R
0
0
30
—
14
—
R
R
R
R
0
0
Initial
Value
0
0
0
29
—
13
—
R
R
R
R
0
0
28
12
—
—
R
R
R
R
0
0
R/W
SH: R/WC
PCI: R
SH: R/WC
PCI: R
SH: R/WC
PCI: R
27
11
—
—
R
R
R
R
0
0
26
10
—
—
R
R
R
R
0
0
Description
Master-Abort Interrupt Mask
0: MAI disabled (masked)
1: MAI enabled (not masked)
Read Data Parity Error Interrupt Mask
0: RDPEI disabled (masked)
1: RDPEI enabled (not masked)
Write Data Parity Error Interrupt Mask
0: WDPEI disabled (masked)
1: WDPEI enabled (not masked)
25
—
—
R
R
R
R
0
9
0
24
—
—
R
R
R
R
0
8
0
23
—
—
R
R
R
R
0
7
0
22
—
—
R
R
R
R
0
6
0
21
—
—
R
R
R
R
0
5
0
REQ3
BME
20
—
R
R
R
R
0
4
x
REQ2
BME
19
—
R
R
R
R
0
3
x
REQ1
BME
18
—
R
R
R
R
0
2
x
REQ0
BME
17
—
R
R
R
R
0
1
x
PCIC
BME
16
—
R
R
R
R
0
0
x