R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 44

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

1. Overview
Rev.1.00 Jan. 10, 2008 Page 12 of 1658
REJ09B0261-0100
Item
Serial sound
interface (SSI)
NAND flash
memory
controller (FLCTL)
General purpose
I/O (GPIO)
User break
controller (UBC)
User debug
interface (H-UDI)
Package
Power supply
voltage
Features
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Number of channels: Two (max.)
Supports transfer of compressed and non-compressed data
Selectable frame size
Number of channels: One (max.)
Exclusively for NAND-type flash memory
Operating modes: Command-access mode, sector-access mode
Data transfer FIFOs
⎯ On-chip 224-byte FIFO for transfer of data to and from flash memory
⎯ On-chip 32-byte FIFO for transfer of control codes
⎯ Flag bit to indicate overruns and underruns during access from the
General purpose I/O port pins: 111
Some GPIO pins are configurable as interrupts
Supports user-break interrupts as a facility for debugging
Two break channels
Addresses, data values, types of access, and widths of data are all
specifiable as break conditions
Supports a sequential break function
JTAG interface (TCK, TMS, TRST, TDI, TDO)
Supports the E10A emulator
Realtime branch tracing
436-pin flip-chip BGA (body: 19 x 19 mm, ball pitch: 0.8-mm)
Internal (VDD), PLL1 (VDD-PLL1, VDDA-PLL1), PLL2 (VDD-PLL2):
1.1 V
DDR2 I/O (VDD-DDR): 1.8 V
I/O (VDDQ), PLL1 (VDDQ-PLL1), PLL2 (VDDQ-PLL2): 3.3 V
CPU or DMA