R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 334

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

10. Interrupt Controller (INTC)
(2)
INT2A0 is a 32-bit read-only register that indicates the interrupt sources of on-chip peripheral
modules. Even if an interrupt is masked by the interrupt mask register, the corresponding bit in
INT2A0 is set (further interrupt operation is not performed for the corresponding bit). Use
INT2A1 instead if the bits for the interrupt sources masked by the interrupt mask registers should
not be set.
Table 10.6 shows the correspondence between bits in INT2A0 and the interrupt sources.
Table 10.6 Correspondence between Bits in INT2A0 and Interrupt Sources
Rev.1.00 Jan. 10, 2008 Page 302 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to
29
28
27
26
25
24
23
22
R/W:
R/W:
Interrupt Source Register (Not affected by Mask Setting) (INT2A0)
Bit:
Bit:
Initial
Value
All 0
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
31
15
—
—
R
R
0
30
—
14
—
R
R
0
R/W Source
R
R
R
R
R
R
R
R
29
—
13
—
R
R
0
Reserved
GDTA
DU
SSI
channel 1
SSI
channel 0
GPIO
FLCTL
MMCIF
28
12
—
—
R
R
27
11
—
—
R
R
Function
These bits are always read
as 0. The write value
should always be 0.
GDTA interrupt source
indication
DU interrupt source
indication
SSI channel 1 interrupt
source indication
SSI channel 0 interrupt
source indication
GPIO interrupt source
indication
FLCTL interrupt source
indication
MMCIF interrupt source
indication
26
10
—
—
R
R
25
—
—
R
R
9
24
—
—
R
R
8
23
—
—
R
R
7
22
—
—
R
R
6
21
—
—
R
R
Description
These bits indicate the
interrupt source of each
peripheral module that is
generating an interrupt.
(INT2A0 is not affected by the
setting of the interrupt mask
register).
0: No interrupt
1: An interrupt has occurred
Note: Interrupt sources can
5
20
—
—
R
R
4
also be identified by
directly reading the
INTEVT code. In this
case, reading from this
register is not required.
19
—
—
R
R
3
18
—
—
R
R
2
17
—
—
R
R
1
16
—
—
R
R
0