R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 249
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ADBGV#RD0Z
Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ADBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ADBGV#RD0ZR8A77850ADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bit
10, 9
8
7 to 4
3
2
1
0
Bit Name
⎯
ICE
⎯
OCI
CB
WT
OCE
Initial
Value
All 0
0
All 0
0
0
0
0
R/W
R
R/W
R
R/W
R/W
R/W
R/W
Description
Reserved
For details on reading from or writing to these bits, see
description in General Precautions on Handling of
Product.
IC Enable Bit
Selects whether the IC is used. Note however when
address translation is performed, the IC cannot be used
unless the C bit in the page management information is
also 1.
0: IC not used
1: IC used
Reserved
For details on reading from or writing to these bits, see
description in General Precautions on Handling of
Product.
OC Invalidation Bit
When 1 is written to this bit, the V and U bits of all OC
entries are cleared to 0. This bit is always read as 0.
Copy-Back Bit
Indicates the P1 area cache write mode.
0: Write-through mode
1: Copy-back mode
Write-Through Mode
Indicates the P0, U0, and P3 area cache write mode.
When address translation is performed, the value of the
WT bit in the page management information has
priority.
0: Copy-back mode
1: Write-through mode
OC Enable Bit
Selects whether the OC is used. Note however when
address translation is performed, the OC cannot be
used unless the C bit in the page management
information is also 1.
0: OC not used
1: OC used
Rev.1.00 Jan. 10, 2008 Page 217 of 1658
REJ09B0261-0100
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