R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1312
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ADBGV#RD0Z
Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ADBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ADBGV#RD0ZR8A77850ADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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25. Audio Codec Interface (HAC)
Notes: 1. CMDAMT and CMDDMT have no associated interrupts. Poll these bits until they are
Rev.1.00 Jan. 10, 2008 Page 1280 of 1658
REJ09B0261-0100
Bit
27 to 10
9
8
7 to 0
2. These bits are readable/writable. Writing 0 to the bit initializes it but writing 1 has no
Bit Name
⎯
PLTFUN
PRTFUN
⎯
read as 1 before writing a new command to HACCSAR/HACCSDR. When bit 19 (RW)
of HACCSAR is 0 and TX12_ATOMIC is 1, take the following steps:
effect.
1.
2.
3.
Initialize CMDDMT and CMDAMT before first accessing a codec register after HAC
initialization by any reset event.
After making the settings in HACCSDR and HACCSAR, poll CMDDMT and
CMDAMT until they are cleared to 1, and then initialize these bits.
Now the next write to a register is available.
Initial
Value
All 0
0
0
All 0
R/W*
R
R/W
R/W
R
2
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
PCML TX Underrun
0: No PCML TX underrun has occurred.
1: PCML TX underrun has occurred because the codec
PCMR TX Underrun
0: No PCMR TX underrun has occurred.
1: PCMR TX underrun has occurred because the codec
Reserved
These bits are always read as 0. The write value should
always be 0.
has requested slot 3 data but new data is not written
to HACPCML.
has requested slot 4 data but new data is not written
to HACPCMR.
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