HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 476

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 16 I/O Ports (I/O)
Table 16.1 Port A Register
Name
Port A data register
Note: * Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For details
16.2.2
PADR is a 16-bit read/write register that stores data for port A. Bits PA15DR–PA0DR correspond
to the PA15/IRQ3/DREQ1–PA0/CS4/TIOCA0 pins. When the pins are used as ordinary outputs,
they will output whatever value is written in PADR; when PADR is read, the register value will be
output regardless of the pin status. When the pins are used as ordinary inputs, the pin status rather
than the register value is read directly when PADR is read. When a value is written to PADR, that
value can be written into PADR, but it will not affect the pin status. Table 16.2 shows port A data
register read/write operations.
PADR is initialized by a power-on reset. However, PADR is not initialized by a manual reset, or
in standby mode or sleep mode.
Table 16.2 Port A Data Register (PADR) Read/Write Operations
PAIOR
0
1
Rev. 7.00 Jan 31, 2006 page 448 of 658
REJ09B0272-0700
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
on the register addresses, see section 8.3.5, Area Descriptions.
Port A Data Register (PADR)
Pin Status
Input
Other function
Output
Other function
PA15DR PA14DR PA13DR PA12DR PA11DR PA10DR PA9DR
PA7DR
Abbreviation
PADR
R/W
R/W
15
0
7
0
Read
Pin status
Pin status
PADR value
PADR value
PA6DR
R/W
R/W
14
0
6
0
R/W
R/W
PA5DR
R/W
R/W
13
0
5
0
Can write to PADR, but it has no effect on pin status.
Write
Can write to PADR, but it has no effect on pin status.
Value written is output by pin
Can write to PADR, but it has no effect on pin status.
Initial Value
H'0000
PA4DR
R/W
R/W
12
0
4
0
PA3DR
R/W
R/W
11
0
3
0
H'5FFFFC0
Address*
PA2DR
R/W
R/W
10
0
2
0
PA1DR
R/W
R/W
Access Size
8, 16, 32
9
0
1
0
PA8DR
PA0DR
R/W
R/W
8
0
0
0