HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 155

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

8.3
8.3.1
Figure 8.3 shows the address format used in this chip.
Since this chip uses a 32-bit address, 4 Gbytes of space can be accessed in the architecture;
however, the upper 4 bits (A31–A28) are always ignored and not output. Bit A27 is basically only
used for switching the bus width. When the A27 bit is 0 (H'0000000–H'7FFFFFF), the bus width
is 8 bits; when the A27 bit is 1 (H'8000000–H'FFFFFFF), the bus width is 16 bits. With the
remaining 27 bits (A26–A0), a total of 128 Mbytes can thus be accessed.
The 128-Mbyte space is subdivided into 8 areas (areas 0–7) of 16 Mbytes each according to the
values of bits A26–A24. The space with bits A26–A24 as 000 is area 0 and the space with bits
A26–A24 as 111 is area 7. The A26–A24 bits are decoded and are output as the chip select signals
(CS0–CS7) of the corresponding areas 0–7. Table 8.7 shows how the space is divided.
A31–A28 A27
Address Spaces and Areas
Address Space Subdivision
Ignored: Always ignored, not output externally
A26–A24
Basic bus width selection:
Not output externally, but used for basic bus width selection
When 0, (H'0000000–H'7FFFFFF), the basic bus width is 8 bits.
When 1, (H'8000000–H'FFFFFFF), the basic bus width is 16 bits.
Area selection:
Decoded to become chip select signals CS0–CS7 for areas 0–7
A23,A22
Figure 8.3 Address Format
4-Gbyte space
Ignored: Only valid when the address multiplex
function is being used in the DRAM space (area 1);
not output in other cases. When not output,
becomes shadow.
A21
128-Mbyte space
Rev. 7.00 Jan 31, 2006 page 127 of 658
16-Mbyte space
Section 8 Bus State Controller (BSC)
Output address:
Output from address pins
A21–A0
4-Mbyte space
REJ09B0272-0700
A0