HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 459

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

15.2
Table 15.2 summarizes the registers of the pin function controller.
Table 15.2 Pin Function Controller Registers
Name
Port A I/O register
Port A control register 1
Port A control register 2
Port B I/O register
Port B control register 1
Port B control register 2
Column address strobe
pin control register
Note: * Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For details
15.3
15.3.1
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for the
16 pins of port A. Bits PA15IOR–PA0IOR correspond to pins PA15/IRQ3/DREQ1–
PA0/CS4/TIOCA0. PAIOR is enabled when the port A pins function as input/outputs (PA15–
PA0) and for ITU input capture and output compare (TIOCA1, TIOCA0, TIOCB1, and TIOCB0).
For other functions, they are disabled. For port A pin functions PA15–PA0 and TIOCA1,
TIOCA0, TIOCB1, and TIOCB0, a given pin in port A is an output pin if its corresponding
PAIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PAIOR is initialized to H'0000 by a power-on reset; however, it is not initialized by a manual
reset, or in standby mode or sleep mode.
Bit
Initial value
Read/Write
on the register addresses, see section 8.3.5, Area Descriptions.
Register Descriptions
Port A I/O Register (PAIOR)
Register Configuration
PA15
R/W
IOR
15
0
Abbreviation R/W
PACR2
CASCR
PAIOR
PACR1
PBIOR
PBCR1
PBCR2
PA14
R/W
IOR
14
0
PA13
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IOR
13
0
Initial Value
H'3302
H'FF95
H'0000
H'0000
H'5FFF
H'0000
H'0000
PA12
R/W
IOR
12
0
Section 15 Pin Function Controller (PFC)
Rev. 7.00 Jan 31, 2006 page 431 of 658
PA11
R/W
IOR
11
0
Address*
H'5FFFFC4
H'5FFFFC8
H'5FFFFCA
H'5FFFFC6
H'5FFFFCC
H'5FFFFCE
H'5FFFFEE
PA10
R/W
IOR
10
0
REJ09B0272-0700
Access Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
R/W
PA9
IOR
9
0
R/W
PA8
IOR
8
0