ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 34
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ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
- Current page: 34 of 367
- Download datasheet (7Mb)
5.5.1
5.6
5.6.1
34
PLL
Atmel ATmega16/32/64/M1/C1
Oscillator Calibration Register – OSCCAL
Internal PLL
• Bits 7..0 – CAL7..0: Oscillator Calibration Value
The Oscillator Calibration Register is used to trim the Calibrated Internal RC Oscillator to
remove process variations from the oscillator frequency. The factory-calibrated value is auto-
matically written to this register during chip reset, giving an oscillator frequency of 8.0MHz at
25°C. The application software can write this register to change the oscillator frequency. The
oscillator can be calibrated to any frequency in the range 7.3 - 8.1MHz within ±1% accuracy.
Calibration outside that range is not guaranteed.
Note that this oscillator is used to time EEPROM and Flash write accesses, and these write
times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to
more than 8.8MHz. Otherwise, the EEPROM or Flash write may fail.
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00
gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in
the range. Incrementing CAL6..0 by 1 will give a frequency increment of less than 2% in the
frequency range 7.3 - 8.1MHz.
The internal PLL in ATmega16/32/64/M1/C1 generates a clock frequency that is 64x multiplied
from its nominal 1MHz input. The source of the 1MHz PLL input clock can be:
See the
When the PLL is locked on the RC Oscillator, adjusting the RC Oscillator via OSCCAL Regis-
ter, will also modify the PLL clock output. However, even if the possibly divided RC Oscillator
is taken to a higher frequency than 8MHz, the PLL output clock frequency saturates at 70MHz
(worst case) and remains oscillating at the maximum frequency. It should be noted that the
PLL in this case is not locked any more with its 1MHz source clock.
Therefore it is recommended not to take the OSCCAL adjustments to a higher frequency than
8MHz in order to keep the PLL in the correct operating range.
The internal PLL is enabled only when the PLLE bit in the register PLLCSR is set. The bit
PLOCK from the register PLLCSR is set when PLL is locked.
Both internal 8MHz RC Oscillator, Crystal Oscillator and PLL are switched off in Power-down
and Standby sleep modes.09/11
Bit
Read/Write
Initial Value
• the output of the internal RC Oscillator divided by 8
• the output of the Crystal Oscillator divided by 8
• the external clock divided by 8
Figure 5-3 on page
CAL7
R/W
7
CAL6
R/W
6
35.
CAL5
R/W
5
Device Specific Calibration Value
CAL4
R/W
4
CAL3
R/W
3
CAL2
R/W
2
CAL1
R/W
1
CAL0
R/W
0
7647G–AVR–09/11
OSCCAL
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