ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 154

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

14.16.8
154
Atmel ATmega16/32/64/M1/C1
PSC Control Register – PCTL
• Bit 4 – PMODE PSC Mode
Select the mode of PSC.
Table 14-10. PSC Mode Selection
• Bit 3 – POPB: PSC B Output Polarity
If this bit is cleared, the PSC outputs B are active Low.
If this bit is set, the PSC outputs B are active High.
• Bit 2 – POPA: PSC A Output Polarity
If this bit is cleared, the PSC outputs A are active Low.
If this bit is set, the PSC outputs A are active High.
• Bit 1:0 – not use
not use
• Bit 7:6 – PPRE1:0 : PSC Prescaler Select
This two bits select the PSC input clock division factor. All generated waveform will be modi-
fied by this factor.
Table 14-11. PSC Prescaler Selection
• Bit 5 – PCLKSEL: PSC Input Clock Select
This bit is used to select between CLK
Set this bit to select the fast clock input (CLK
Clear this bit to select the slow clock input (CLK
Bit
Read/Write
Initial Value
PMODE
0
1
PPRE1
0
0
1
1
PPRE0
0
1
0
1
PPRE1
R/W
7
0
Description
One Ramp Mode (Edge Aligned)
Center Aligned Mode
PPRE0
R/W
6
0
Description
No divider on PSC input clock
Divide the PSC input clock by 4
Divide the PSC input clock by 32
Divide the PSC clock by 256
PCLKSEL
R/W
5
0
PLL
SWAP2
or CLK
R/W
4
0
PLL
).
IO
IO
).
SWAP1
clocks.
R/W
3
0
SWAP0
R/W
2
0
PCCYC
R/W
1
0
PRUN
R/W
0
0
7647G–AVR–09/11
PCTL