ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 188

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

16.10.2
188
Atmel ATmega16/32/64/M1/C1
CAN General Status Register - CANGSTA
• Bit 0 – SWRES: Software Reset Request
This auto resettable bit only resets the CAN controller.
• Bit 7 – Reserved Bit
This bit is reserved for future use.
• Bit 6 – OVRG: Overload Frame Flag
This flag does not generate an interrupt.
• Bit 5 – Reserved Bit
This bit is reserved for future use.
• Bit 4 – TXBSY: Transmitter Busy
This flag does not generate an interrupt.
• Bit 3 – RXBSY: Receiver Busy
This flag does not generate an interrupt.
Initial Value
Read/Write
– 0 - standby mode: The on-going transmission (if exists) is normally terminated and the
– 1 - enable mode: The CAN channel enters in enable mode once 11 recessive bits
– 0 - no reset
– 1 - reset: this reset is “ORed” with the hardware reset.
Bit
– 0 - no overload frame.
– 1 - overload frame: set by hardware as long as the produced overload frame is
– 0 - transmitter not busy.
– 1 - transmitter busy: set by hardware as long as a frame (data, remote, overload or
– 0 - receiver not busy
CAN channel is frozen (the CONMOB bits of every MOb do not change). The
transmitter constantly provides a recessive level. In this mode, the receiver is not
enabled but all the registers and mailbox remain accessible from CPU. In this mode,
the receiver is not enabled but all the registers and mailbox remain accessible from
CPU.
has been read.
sent.
error frame) or an ACK field is sent. Also set when an inter frame space is sent.
Note:A standby mode applied during a reception may corrupt the on-going reception or set the
controller in a wrong state. The controller will restart correctly from this state if a soft-
ware reset (SWRES) is applied. If no reset is considered, a possible solution is to wait
for a lake of a receiver busy (RXBSY) before to enter in stand-by mode. The best solu-
tion is first to apply an abort request command (ABRQ) and then wait for the lake of the
receiver busy (RXBSY) before to enter in stand-by mode. In any cases, this standby
mode behavior has no effect on the CAN bus integrity.
7
-
-
-
OVRG
R
6
0
5
-
-
-
TXBSY
R
4
0
RXBSY
R
3
0
ENFG
R
2
0
BOFF
R
1
0
ERRP
R
0
0
7647G–AVR–09/11
CANGSTA