ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 131

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

Table 13-4.
Note:
7647G–AVR–09/11
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
1. The CTCn and PWMn1:0 bit definition names are obsolete. Use the
WGMn3
location of these bits are compatible with previous versions of the timer.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Waveform Generation Mode Bit Description
WGMn2
(CTCn)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 13-3
correct or the phase and frequency correct, PWM mode.
Table 13-3.
Note:
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes.
PWM” on page
(PWMn1)
WGMn1
COMnA1/COMnB1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set.
0
0
1
1
(PWMn0) Timer/Counter Mode of Operation
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase
See “Phase Correct PWM Mode” on page 123.
WGMn0
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
107.).
(1)
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency Correct ICRn
PWM, Phase and Frequency Correct OCRnA
PWM, Phase Correct
PWM, Phase Correct
CTC
(Reserved)
Fast PWM
Fast PWM
COMnA0/COMnB0
(1)
0
1
0
1
Atmel ATmega16/32/64/M1/C1
Table
WGM
Description
Normal port operation, OCnA/OCnB disconnected.
WGMn3:0 = 8, 9 10 or 11: Toggle OCnA on Compare
Match, OCnB disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OCnA/OCnB on Compare Match when
up-counting. Set OCnA/OCnB on Compare Match
when downcounting.
Set OCnA/OCnB on Compare Match when
up-counting. Clear OCnA/OCnB on Compare Match
when downcounting.
13-4. Modes of operation supported by the
n2:0 definitions. However, the functionality and
for more details.
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCRnA
0x00FF
0x01FF
0x03FF
ICRn
OCRnA
ICRn
–
ICRn
OCRnA
(See “16-bit Timer/Counter1 with
Update of
OCRn
Immediate
TOP
TOP
TOP
Immediate
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP
TOP
Immediate
–
TOP
TOP
x
at
TOVn Flag
Set on
MAX
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
MAX
–
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
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