ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 105

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

12.8.3
12.8.4
12.8.5
12.8.6
7647G–AVR–09/11
Timer/Counter Register – TCNT0
Output Compare Register A – OCR0A
Output Compare Register B – OCR0B
Timer/Counter Interrupt Mask Register – TIMSK0
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Com-
pare Match on the following timer clock. Modifying the counter (TCNT0) while the counter is
running, introduces a risk of missing a Compare Match between TCNT0 and the OCR0x
Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0B pin.
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the
Timer/Counter Interrupt Flag Register – TIFR0.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
R/W
R/W
R
7
0
7
0
7
0
7
–
0
R/W
R/W
R/W
R
6
–
0
6
0
6
0
6
0
R/W
R/W
R/W
R
5
–
0
5
0
5
0
5
0
Atmel ATmega16/32/64/M1/C1
R/W
R/W
R/W
R
4
–
0
4
0
4
0
4
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
R/W
R/W
R/W
R
3
–
0
3
0
3
0
3
0
OCIE0B
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
OCIE0A
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
OCR0B
OCR0A
TIMSK0
TCNT0
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