MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 619

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

This sequence is uninterruptable; there is no need to inhibit interrupts during CALL execution. A CALL
can be performed from any address in memory to any other address.
The PPAGE value supplied by the instruction is part of the effective address. For all addressing mode
variations except indexed-indirect modes, the new page value is provided by an immediate operand in the
instruction. In indexed-indirect variations of CALL, a pointer specifies memory locations where the new
page value and the address of the called subroutine are stored. Using indirect addressing for both the new
page value and the address within the page allows values calculated at run time rather than immediate
values that must be known at the time of assembly.
The RTC instruction terminates subroutines invoked by a CALL instruction. RTC unstacks the PPAGE
value and the return address and refills the queue. Execution resumes with the next instruction after the
CALL.
During the execution of an RTC instruction, the CPU:
This sequence is uninterruptable; an RTC can be executed from anywhere in memory, even from a different
page of extended memory in the expansion window.
The CALL and RTC instructions behave like JSR and RTS, except they use more execution cycles.
Therefore, routinely substituting CALL/RTC for JSR/RTS is not recommended. JSR and RTS can be used
to access subroutines that are on the same page in expanded memory. However, a subroutine in expanded
memory that can be called from other pages must be terminated with an RTC. And the RTC unstacks a
PPAGE value. So any access to the subroutine, even from the same page, must use a CALL instruction so
that the correct PPAGE value is in the stack.
22.4.3.2
If the EMK bit in the MODE register is set (see MEBI block description chapter) the PIX5:0 values will
be output on XAB19:14 respectively (port K bits 5:0) when the system is addressing within the physical
program page window address space (0x8000–0xBFFF) and is in an expanded mode. When addressing
anywhere else within the physical address space (outside of the paging space), the XAB19:14 signals will
be assigned a constant value based upon the physical address space selected. In addition, the active-low
emulation chip select signal, ECS, will likewise function based upon the assigned memory allocation. In
the cases of 48K byte and 64K byte allocated physical FLASH/ROM space, the operation of the ECS
signal will additionally depend upon the state of the ROMHM bit (see
System Control Register
Freescale Semiconductor
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Calculates the address of the next instruction after the CALL instruction (the return address), and
pushes this 16-bit value onto the stack.
Pushes the old PPAGE value onto the stack.
Calculates the effective address of the subroutine, refills the queue, and begins execution at the new
address on the selected page of the expansion window.
Pulls the old PPAGE value from the stack
Pulls the 16-bit return address from the stack and loads it into the PC
Writes the old PPAGE value into the PPAGE register
Refills the queue and resumes execution at the return address
Extended Address (XAB19:14) and ECS Signal Functionality
(MISC)”) in the MISC register.
MC9S12HZ256 Data Sheet, Rev. 2.05
Table
22-18,
Chapter 22 Module Mapping Control (MMCV4)
Table
Section 22.3.2.4, “Miscellaneous
22-19,
Table
22-20, and
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