pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 98

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

Figure 48
Pre-processed Channel Codes
Semiconductor Group
m
-
C/I
D
SIG
actual value
stable value
DD Application
Decentral
D Channel
Handling
Central
D Channel
Handling
6 Bit
Signaling
(e.g. analog
IOM )
8 Bit
Signaling
(e.g. SLD)
SACCO_A
D Channel
Handling
DU Application
Decentral
D Channel
Handling
Central
D Channel
Handling
6 Bit
Signaling
(e.g. analog
IOM )
8 Bit
Signaling
(e.g. SLD)
R
R
: Monitor channel bits, these bits are treated by the monitor/feature control handler
: Inactive sub. time-slot, in downstream direction these bits are tristated (OMDR : COS = 0) or set to logical 1 (OMDR :COS = 1)
: Command/Indication channel, these bits are exchanged between the CFI in/output and the CM data field. A change of
: D channel, these D channel bit switched to and from the PCM interface, or handled by the SACCO_A,
: Signaling Channel, these bits are exchanged between the CFI in/output and tne CM data field. The SIG value which
the C/I bits in upstream direction causes an interrupt (ISTA : SFI). The address of the change is stored in the CIFIFO
it the D channel arbiter is enabled.
was present in the last frame is stored as the actual value in the even address CM location. The stable value is updated
if a valid change in the actual value has been detected according to the last look algorithm. A change of the SIG stable
value in upstream direction causes an interrupt (ISTA : CFI). The address of the change is stored in the CIFIFO.
1 0 0 0
1
1 0 1 0
1
1 0 1 0
When using handshaking, set MR = 1
Code Field
MACR = 0111...
1
1 0 0 0
1
1 0 1 1
Code Field
MACR = 0111...
0
0
Even Control Memory Address
0
0
Even Control Memory Address
1
1
0
1
0
0
MAAR = 0......0
0
0
MAAR = 1......1
1 1
1
1 1
1
1 1
SIG Actual Value
1
1
SIG Actual Value
SIG
Data Field
MADR = ......
Data Field
MADR = ......
SIG
C/I
C/I
C/I
C/I
C/I
M
R
1
1
1 1
X
1
1
1
1
1
X
1
1
PCM Code for
1
a 2 Bit Sub.
Time-Slot
1 0 1 1
1 0 1 1
1 0 1 1
Code Field
MACR = 0111...
0 0 0 0
PCM Code for
a 2 Bit Sub.
Time-Slot
1
1
Code Field
MACR = 011...
0
Odd Control Memory Address
0
0
Odd Control Memory Address
1
1
1
1
0
1
MAAR = 0......1
MAAR = 1......1
X
X X
X X
X X
98
X X
Pointer to a PCM Time-Slot
Pointer to a PCM Time-Slot
SIG Stable Value X X
X
SIG Stable Value
X
X X
X X
X X
Data Field
MADR = ......
X X
Data Field
MADR = ......
X
X
X X
X X
X X
X X
X
X
X
X
X
X
X
X
X
X
X
Even Time-Slot
m m m m m m m m
m
m m m m m m m m
m m m m m m m m
m m m m m m m m
Feature Control Channel
Even Time-Slot
m
m m m m m m m m
m
m
Feature Control Channel
m
Monitor Channel
Monitor Channel
Monitor Channel
Monitor Channel
m
m
m
Downstream Preprocessed Channels
Monitor Channel
Monitor Channel
Monitor Channel
Output at the Configurable Interface
Operational Description
m
Input from the Configurable Interface
m
m
m
Upstream Preprocessed Channels
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
m
D D
D
- -
- -
D
Signaling Channel
D
Control Channel
Control Channel
Control Channel
Control Channel
D
Signaling Channel
Control Channel
Control Channel
Control Channel
SIG
Odd Time-Slot
PEB 20550
SIG
PEF 20550
Odd Time-Slot
SIG
C/I
C/I
C/I
SIG
C/I
C/I
m m
m
m m
m m
m
m m
m
m
ITD05845
m
m
ITD05846
01.96