pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 244

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

– In test mode (OMS1 … 0 = 01) the ELIC sustains normal operation. However
5.3.3
The memory access commands can be divided into the following four categories:
– Access to the Data Memory Data Field: P access to PCM frame
– Access to the Data Memory Code Field: PCM tristate control
– Access to the Control Memory Data Field: timeslot assignment, P access to CFI
– Access to the Control Memory Code Field: set-up of CFI timeslot functionality
In the following chapters, these commands are explained in more detail.
5.3.3.1 Access to the Data Memory Data Field
The data memory (DM) data field buffers the PCM data transmitted (upstream block) and
received (downstream block) via the PCM interface. Normally this data is switched
transparently from or to the CFI and there is no need to access it from the P interface.
For some applications however it is useful to have a direct P access to the PCM frame.
When an upstream PCM timeslot (or even sub-timeslot) is not switched from the CFI
(unassigned channel), it is possible to write a fixed value to the corresponding DM data
field location. This value will then be transmitted repeatedly in each PCM frame without
further P interaction (PCM idle code). If instead a continuous pattern should be sent,
the write access can additionally be synchronized to the frame by means of synchronous
transfer interrupts (see chapter 5.7).
Writing to an upstream DM data field location can also be restricted to a 2 or 4 bit sub-
timeslot. It is thus possible to have certain sub-timeslots of the same 8 bit timeslot
switched from the CFI with the other sub-timeslots containing a PCM idle code. This
restriction is made via the Memory Operation Code (refer to table 38).
For test purposes the upstream DM data field contents can also be read back.
The downstream DM data field cannot be written to, it can only be read. Reading such
a location reflects the PCM data contained in the received PCM frame regardless of a
connection to the CFI having been established or not. The P can thus determine the
contents of received PCM timeslots simply by reading the corresponding downstream
DM locations. This reading can, if required, also be synchronized to the frame by means
of synchronous transfer interrupts.
Semiconductor Group
memory accesses are no longer performed on a specific address defined by MAAR,
but on all locations of the selected memory, the contents of MAAR (including the U/D
bit!) being ignored. This function can for example be used to program a PCM idle code
to all PCM ports and timeslots with a single command.
frame
Memory Access Commands
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Application Hints
PEB 20550
PEF 20550
01.96