pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 228

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

CFI Timeslot Adjustment and Bit Shift
If CBSR = 20
marks bit 7 of the CFI timeslot called TSN according to the following formula:
CTAR:TSN6 … 0 = TSN + 2
e.g. CTAR must be set to 02
See examples.
Note that the value of TSN may not exceed the actual number of timeslots per CFI frame:
TSN = [ – 2; I – 3], I = total number of timeslots per CFI frame
From the zero offset bit position (CBSR = 20
upstream) can be shifted by up to 5 bits to the left (within the timeslot
number TSN programmed in CTAR) and by up to 2 bits to the right (within the previous
timeslot N – 1) by programming the CBSR:CDS2 … 0 bits:
Table 34
CFI Shift with Respect to the Frame Synchronization Signal
CBSR:CDS2 … 0
000
001
010
011
100
101
110
111
The bit shift programmed to CBSR:CDS2 … 0 affects both the upstream and
downstream frame position in the same way.
If CBSR:CUS3 … 0 = 0000, the upstream frame is aligned to the downstream frame.
With CBSR:CUS3 … 0 = 0001 to 1111, the upstream CFI frame can be shifted relative
to the downstream frame by up to 15 bits to the left as indicated in figure 77.
Semiconductor Group
H
, the CFI framing signal (PFS if CMD1:CSS = 0 or FSC if CMD1:CSS = 1)
Timeslot #
TSN – 1
TSN – 1
TSN
TSN
TSN
TSN
TSN
TSN
H
if the framing signal should mark timeslot 0, bit 7 (TS = 0).
228
Marked Bit #
1
0
7
6
5
4
3
2
H
) the CFI frame (downstream and
Bit Shift
2 bits to the right
1 bit to the right
no bit shift
1 bit to the left
2 bits to the left
3 bits to the left
4 bits to the left
5 bits to the left
Application Hints
PEB 20550
PEF 20550
01.96