pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 168

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

4.7.6
Access in demultiplexed
Access in multiplexed
Reset value: 00
Note: The maximum time between writing to the CMDR-register and the execution of the
RMC
Note: In DMA-mode this command is only issued once after a RME-interrupt. The
RHR
AREP/
XREP
Note: MODE:CFT must be set to ’0’ when using cyclic transmission.
Semiconductor Group
bit 7
P-interface mode:
P-interface mode:
RMC
command is 2.5 HDC-clock cycles. Therefore, if the CPU operates with a very high
clock speed in comparison to the SACCO-clock, it is recommended that the bit
STAR:CEC is checked before writing to the CMDR-register to avoid loosing of
commands.
SACCO does not generate further DMA requests prior to the reception of this
command.
Command Register (CMDR)
Receive Message Complete.
A ’1’ confirms, that the actual frame or data block has been fetched following
a RPF- or RME-interrupt, thus the occupied space in the RFIFO can be
released.
Reset HDLC-Receiver.
A ’1’ deletes all data in the RFIFO and in the HDLC-receiver.
Auto Repeat/Transmission Repeat.
Auto-mode: AREP
The frame (max. length 32 byte) stored in XFIFO can be polled repeatedly
by the opposite station until the frame is acknowledged.
Extended transparent mode 0,1: XREP
Together with XTF- and XME-set (CMDR = 2A
transmits the contents of the XFIFO (1…32 bytes) fully transparent without
HDLC-framing, i.e. without flag, CRC-insertion, bit stuffing.
The cyclical transmission continues until the command (CMDR:XRES) is
executed or the bit XREP is reset. The inter frame timefill pattern is issued
afterwards.
When resetting XREP, data transmission is stopped after the next XFIFO-
cycle is completed, the XRES-command terminates data transmission
immediately.
RHR
H
AREP/
XREP
0
write
write
168
XPD/
XTF
address: (Ch-A/Ch-B): 21
address: (Ch-A/Ch-B): 42
Detailed Register Description
XDD
H
) the SACCO repeatedly
XME
PEB 20550
PEF 20550
H
H
bit 0
/61
/C2
XRES
H
H
01.96