pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 107

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

The resetting of the complete CM takes 256 RCL-clock cycles. During this time, the
EPIC.STAR:MAC-bit is set to logical 1.
3.8.2.3 Initialization of Pre-processed Channels
After the CM-reset, all CFI time slots are unassigned. If the CFI is used as a plain PCM-
interface, i.e. containing only switched channels (B-channels), the initialization steps
below are not required. The initialization of pre-processed channels applies only to IOM-
or SLD-applications.
An IOM- or SLD-"channel" consists of four consecutive time slots. The first two time
slots, the B-channels need not be initialized since they are already set to unassigned
channels by the CM-reset command. Later, in the application phase of the software, the
B-channels can be dynamically switched according to system requirements. The last two
time slots of such an IOM- or SLD-channel, the pre-processed channels must be
initialized for the desired functionality. There are five options that can be selected:
Table 16
Pre-processed Channel Options at the CFI
Even CFI Time Slot
Monitor/feature control channel
Monitor/feature control channel
Monitor/feature control channel
Monitor/feature control channel
Monitor/feature control channel
Also refer to figure 49.
Semiconductor Group
Odd CFI Time Slot
4-bit C/I-channel, D-channel
handled by SACCO-A and D-ch.
arbiter
4-bit C/I-channel, D-channel not
switched (decentral D-ch.
handling)
4-bit C/I-channel, D-channel
switched (central D-ch. handling)
6-bit SIG-channel
8-bit SIG/channel
107
Operational Description
Main
Application
IOM-1 or IOM-2
digital subscriber
IOM-1 or IOM-2
digital subscriber
IOM-1 or IOM-2
digital subscriber
IOM-2, analog
subscriber
SLD, analog
subscriber
PEB 20550
PEF 20550
01.96